DevOps Articles

The RISC-V Architecture

by This article introduces the exciting, relatively new RISC-V (pronounced risk five) processor architecture and its instruction set. RISC-V is a completely open source specification for a reduced instruction set processor.

To avoid introducing instructions that are not strictly necessary, many instructions take on extra duties that are performed by dedicated instructions in other processor architectures.

RISC-V processors are offered commercially, and open source products are available to implement instantiations of RISC-V in FPGA devices.